Senior Verification Engineer

 

 

The System Solutions Enablement team is looking for key talent to support our mission of enabling customers with system intellectual property (IP) solutions. This mission includes design and validation of re-usable, logically complex or performance critical IP that requires system level consideration when integrating into an ASIC. The team plays a key role in selecting, acquiring, designing, verifying and integrating intellectual property with a special focus towards reuse and quality.

Place of  work: Bratislava, Mlynské nivy 14 (hybrid model: home office + office)

Working time: Flexible working hours

Salary: From 3 500 EUR, depends on candidate´s experience

Job description:

  • Architect logically complex digital verification environments
  • Developing SystemVerilog/UVM testbenches for block and SoC level functional verification
  • Developing detailed verification plans for block/SoC
  • Debugging and correcting functional errors in the RTL, using simulation tools, debug tools, and programming skills
  • Defining and implementing functional coverage, and enhancing the testbench to ensure coverage closure
  • Documenting test plans and testbench design
  • Lead project teams and mentor junior team members

Requirements:

  • BS degree in Electrical Engineering or related field
  • 10 years of digital verification experience
  • Sound knowledge of Verilog or System Verilog
  • Experience with verification methodologies e.g. UVM
  • Experience with scripting language like Python/Perl
  • Good command of English
  • Self-motivated with the ability to work independently and interface effectively with team members in a remote location
  • Experience with high-speed interfaces, such as DDR, PCIe or MIPI, is an advantage

Contact us:

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     ÁNO, súhlasím.
    Zaškrtnutím políčka udeľujem súhlas so spracúvaním a uchovávaním svojich osobných údajov (uvedených v žiadosti o prijatie do zamestnania, v profesijnom životopise, osobnom dotazníku, prípadne osobných údajov získaných pri osobnom pohovore) prevádzkovateľovi ON Semiconductor Slovakia, a.s., so sídlom Vrbovská cesta 2617/102 Piešťany, 921 01, IČO: 36227943. Poskytnuté údaje budú spracované pre účely evidencie uchádzačov o zamestnanie v súlade so všeobecným nariadením o ochrane údajov.
    Súhlas udeľujem na dobu určitú, konkrétne na obdobie 3 rokov.
    Informovanie:
    Ako dotknutá osoba máte právo súhlas kedykoľvek odvolať. Za účelom viacstupňového schvaľovacieho procesu budú Vaše údaje nahraté do globálneho systému ,,Taleo“.
    V tomto systéme budú Vaše údaje uchovávané po dobu 6 mesiacov.
    (bližšie informácie)

    Jana Poliaková